Reading DCGM Counters

October 10, 2026

Reading DCGM Counters: How Two Numbers Tell Me What My GPU Is Doing

When I stood up DCGM in my lab, I had one question: how do I tell, from telemetry alone, whether a workload is starving the GPU or saturating it? The answer turned out to be two counters read as a pair — and my first measured run gave me a textbook example.

The two counters

DCGM exposes thousands of fields, but for performance diagnosis two carry most of the weight:

Either one alone lies. SM util at 100% sounds great — unless memory util is pinned at 100% too, in which case my SMs are busy waiting for data. So I read them as a pair: high SM + low mem means compute-bound (the math is the bottleneck); low SM + high mem means bandwidth-bound (the data path is the bottleneck); both low means the GPU is idle or the workload is broken somewhere upstream.

The worked example

My first measured run was an 8192×8192 FP32 matrix multiplication, 325 iterations on a Tesla T4, watched with dcgmi dmon -e 100,150,155,203,204 (SM clock, temperature, power, SM util, memory util). The counters settled into:

Here’s what that looked like on my terminal — the moment the workload starts is the moment the idle zeros disappear:

dcgmi dmon -e 100,150,155,203,204
#Entity   SMCLK   TMPTR   POWER   GPUTL   MCUTL
ID                  C       W
GPU 0      300      55     10.65     0       0
GPU 0      300      55     10.55     0       0
GPU 0      600      59     68.92    93      45
GPU 0      555      60     73.04   100      44
GPU 0      585      60     68.24   100      57
GPU 0      615      61     68.04   100      46

(GPUTL is the SM utilization counter, MCUTL is memory copy utilization — dmon’s abbreviations aren’t obvious. Trimmed from the full capture; the complete run is in the lab repo as workload/dcgmi_dmon.out.)

SMs saturated, memory system half-idle: textbook compute-bound. Memory bandwidth wasn’t the constraint — the arithmetic was. That’s the pair rule from my GPU performance post working on a real card, not just on paper.

The surprise: the power wall

What caught my eye wasn’t in the utilization pair at all — it was power. The T4 is a 70 W card, and my readings brushed 61–86 W under boost. The card was riding its power envelope: no kernel optimization would have squeezed more TFLOPS out of that run, because there was no more power to clock higher with. This is the wall I wrote about in the performance piece — on modern GPUs the limiter is increasingly watts, not transistors. It also reframes “36% of peak”: the gap wasn’t my code, it was the envelope.

Full measurement table and reproduction scripts: DCGM GPU telemetry in the lab section.

What the pair doesn’t tell you

The pair rule got me the right diagnosis on my T4 run, but it has blind spots worth naming:

None of these invalidated my run — but each one is a way the counters could have lied to me, and I didn’t know to check until I went looking.

What I’m running next

A bandwidth-bound pattern — large vector adds that barely touch the SMs — to watch the pair flip: low SM, high memory. If this post is the compute-bound case study, that run completes the pair. Same counters, same method, opposite diagnosis.